Ricoh R5C841 Manual do Utilizador Página 34

  • Descarregar
  • Adicionar aos meus manuais
  • Imprimir
  • Página
    / 73
  • Índice
  • MARCADORES
  • Avaliado. / 5. Com base em avaliações de clientes
Vista de página 33
R5C841 PCI-CardBus/IEEE 1394/SD Card/Memory Stick/xD/ExpressCard Data Sheet
12345 2004 REV.1.10 4-9
· 4Ah PME Trigger Enable [7:0]
· ACh Writable Subsystem Vendor ID [15:0]
· AEh Writable Subsystem ID [15:0]
· F8h MS Misc Control [31:0]
· FCh Key [7:0]
xD Picture Card Interface Config Space:
· 2Ch Subsystem Vendor ID [15:0]
· 2Eh Subsystem ID [15:0]
· 40h xD Picture Card Clock Control [23:0]
· 4Ah PME Trigger Enable [7:0]
· ACh Writable Subsystem Vendor ID [15:0]
· AEh Writable Subsystem ID [15:0]
· F8h xD Misc Control [31:0]
· FCh Key [7:0]
1394 OHCI Register:
· 24h Global Unique ID High [31:0]
· 28h Global Unique ID Low [31:0]
1394 PHY Register:
·All Registers
SD Card Register:
·All Registers
Memory Stick Register:
·All Registers
xD Picture Card Register:
·All Registers
2. These registers are not initialized by PCIRST# when the power state is D3 and PME Enable
bit is set to ”1”. (PME_Context register)
PC Card Socket Status Control Register Space:
· 000h Socket Event [3:0]
· 004h Socket Mask [3:0]
· 008h Socket Present State [11,10,5,4]
· 010h Socket Control [6:4]
· 802h Power Control [7:2]
· 804h Card Status Change [3:0]
· 805h Card Status Change interrupt Configuration [3:0]
· 82Fh Misc Control 1 [0]
PC Card Bridge Config. Space:
· DEh Power Management Capabilities [15]
· E0h Power Management Control/ Status [15,8]
1394 OHCI-LINK Config. Space:
· DEh Power Management Capabilities [15]
· E0h Power Management Control/ Status [15,8]
SD Card Config. Space:
· 82h Power Management Capabilities [15]
· 84h Power Management Control/ Status [15,8]
Memory Stick Config. Space:
· 82h Power Management Capabilities [15]
· 84h Power Management Control/ Status [15,8]
xD Picture Card Config. Space:
· 82h Power Management Capabilities [15]
· 84h Power Management Control/ Status [15,8]
3. Excepting the above registers (PCI RESET Resistant register, PME_Context register) and
the global register, all the registers are initialized by the power state transition from D3 to D0
as long as the power state is D3.
Vista de página 33
1 2 ... 29 30 31 32 33 34 35 36 37 38 39 ... 72 73

Comentários a estes Manuais

Sem comentários